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1

A predictive synchronizer for periodic clock domains

Uri Frank, Tsachy Kapshitz, Ran Ginosar

Journal:

Formal Methods in System Design

Year:

2006

Language:

english

File:

PDF, 379 KB

english, 2006

2

Timing–driven variation–aware synthesis of hybrid mesh/tree clock distribution networks

Abdelhadi, Ameer, Ginosar, Ran, Kolodny, Avinoam, Friedman, Eby G.

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 1.63 MB

english, 2013

3

[IEEE 2011 IEEE International Symposium on Circuits and Systems (ISCAS) - Rio de Janeiro, Brazil (2011.05.15-2011.05.18)] 2011 IEEE International Symposium of Circuits and Systems (ISCAS) - An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm

Beer, Salomon, Ginosar, Ran, Priel, Michael, Dobkin, Rostislav, Kolodny, Avinoam

Year:

2011

Language:

english

File:

PDF, 1.19 MB

english, 2011

4

Computer Architecture with Associative Processor Replacing Last-Level Cache and SIMD Accelerator

Yavits, Leonid, Morad, Amir, Ginosar, Ran

Journal:

IEEE Transactions on Computers

Year:

2015

Language:

english

File:

PDF, 628 KB

english, 2015

5

Topological comparison of perfect shuffle and hypercube

Ran Ginosar, David Egozi

Journal:

International Journal of Parallel Programming

Year:

1989

Language:

english

File:

PDF, 1.21 MB

english, 1989

6

[IEEE 16th IEEE International Symposium on Asynchronous Circuits and Systems - ASYNC 2010 - Grenoble (2010.5.3-2010.5.6)] 2010 IEEE Symposium on Asynchronous Circuits and Systems - The Devolution of Synchronizers

Beer, Salomon, Ginosar, Ran, Priel, Michael, Dobkin, Rostislav, Kolodny, Avinoam

Year:

2010

Language:

english

File:

PDF, 526 KB

english, 2010

7

[IEEE 2013 IEEE International 3D Systems Integration Conference (3DIC) - San Francisco, CA, USA (2013.10.2-2013.10.4)] 2013 IEEE International 3D Systems Integration Conference (3DIC) - 3D cache hierarchy optimization

Yavits, Leonid, Morad, Amir, Ginosar, Ran

Year:

2013

Language:

english

File:

PDF, 262 KB

english, 2013

8

[IEEE 2012 IEEE International Symposium on Circuits and Systems - ISCAS 2012 - Seoul, Korea (South) (2012.05.20-2012.05.23)] 2012 IEEE International Symposium on Circuits and Systems - Energy metrics for power efficient crosslink and mesh topologies

Vaisband, Inna, Friedman, Eby G., Ginosar, Ran, Kolodny, Avinoam

Year:

2012

Language:

english

File:

PDF, 587 KB

english, 2012

9

GP-SIMD Processing-in-Memory

Morad, Amir, Yavits, Leonid, Ginosar, Ran

Journal:

ACM Transactions on Architecture and Code Optimization

Year:

2015

Language:

english

File:

PDF, 1.82 MB

english, 2015

10

The Effect of Temperature on Amdahl Law in 3D Multicore Era

Yavits, Leonid, Morad, Amir, Ginosar, Ran

Journal:

IEEE Transactions on Computers

Year:

2015

Language:

english

File:

PDF, 836 KB

english, 2015

11

[IEEE 2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) - Salvador, Brazil (2015.9.1-2015.9.4)] 2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) - Asynchronous sub-threshold ultra-low power processor

Diamant, Ron, Ginosar, Ran, Sotiriou, Christos

Year:

2015

Language:

english

File:

PDF, 1.28 MB

english, 2015

12

PRINS: Processing-in-Storage Acceleration of Machine Learning The System

Kaplan, Roman, Yavits, Leonid, Ginosar, Ran

Journal:

IEEE Transactions on Nanotechnology

Year:

2018

Language:

english

File:

PDF, 2.18 MB

english, 2018

13

Spatio-Chromatic Image Enhancement Based on a Model of Human Visual Information Processing

Stuart G. Wolf, Ran Ginosar, Yehoshua Y. Zeevi

Journal:

Journal of Visual Communication and Image Representation

Year:

1998

Language:

english

File:

PDF, 1.69 MB

english, 1998

14

Scalable network-on-chip architecture for configurable neural networks

Dmitri Vainbrand, Ran Ginosar

Journal:

Microprocessors and Microsystems

Year:

2011

Language:

english

File:

PDF, 1.13 MB

english, 2011

15

Analog frontend for multichannel neuronal recording system with spike and LFP separation

Yevgeny Perelman, Ran Ginosar

Journal:

Journal of Neuroscience Methods

Year:

2006

Language:

english

File:

PDF, 551 KB

english, 2006

16

QNoC: QoS architecture and design process for network on chip

Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny

Journal:

Journal of Systems Architecture

Year:

2004

Language:

english

File:

PDF, 722 KB

english, 2004

17

Cost considerations in network on chip

Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny

Journal:

Integration, the VLSI Journal

Year:

2004

Language:

english

File:

PDF, 499 KB

english, 2004

18

Self-timed is self-checking

Ilana David, Ran Ginosar, Michael Yoeli

Journal:

Journal of Electronic Testing

Year:

1995

Language:

english

File:

PDF, 588 KB

english, 1995

19

Two-phase synchronization with sub-cycle latency

Rostislav (Reuven) Dobkin, Ran Ginosar

Journal:

Integration, the VLSI Journal

Year:

2009

Language:

english

File:

PDF, 896 KB

english, 2009

20

QNoC asynchronous router

Rostislav (Reuven) Dobkin, Ran Ginosar, Avinoam Kolodny

Journal:

Integration, the VLSI Journal

Year:

2009

Language:

english

File:

PDF, 1.96 MB

english, 2009

21

Adaptive Cardiac Resynchronization Therapy Device: A Simulation Report

RAMI ROM, JACOB EREL, MICHAEL GLIKSON, KOBI ROSENBLUM, RAN GINOSAR, DAVID L. HAYES

Journal:

Pacing and Clinical Electrophysiology

Year:

2005

Language:

english

File:

PDF, 168 KB

english, 2005

22

CARMEL-2: A second generation VLSI architecture for Flat Concurrent Prolog

Arie Harsat, Ran Ginosar

Journal:

New Generation Computing

Year:

1990

Language:

english

File:

PDF, 1.09 MB

english, 1990

23

[IEEE 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004. - Tel Aviv, Israel (Dec. 13-15, 2004)] Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004. - Automatic hardware-efficient SoC integration by QoS network on chip

Bolotin, E., Morgenshtein, A., Cidon, I., Ran Ginosar,, Kolodny, A.

Year:

2004

Language:

english

File:

PDF, 867 KB

english, 2004

24

[IEEE 2012 IEEE 14th Int'l Conf. on High Performance Computing and Communication (HPCC) & 2012 IEEE 9th Int'l Conf. on Embedded Software and Systems (ICESS) - Liverpool, United Kingdom (2012.06.25-2012.06.27)] 2012 IEEE 14th International Conference on High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems - Performance of a Hardware Scheduler for Many-core Architecture

Avron, Itai, Ginosar, Ran

Year:

2012

Language:

english

File:

PDF, 1.49 MB

english, 2012

25

[IEEE 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC) - Madrid, Spain (2010.09.27-2010.09.29)] 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip - Order is power: Selective Packet Interleaving for energy efficient Networks-on-Chip

Berman, Amit, Ginosar, Ran, Keidar, Idit

Year:

2010

Language:

english

File:

PDF, 193 KB

english, 2010

26

[IEEE First International Symposium on Networks-on-Chip - Princeton, NJ, USA (2007.05.7-2007.05.9)] First International Symposium on Networks-on-Chip (NOCS'07) - The Power of Priority: NoC Based Distributed Cache Coherency

Bolotin, Evgeny, Guz, Zvika, Cidon, Israel, Ginosar, Ran, Kolodny, Avinoam

Year:

2007

Language:

english

File:

PDF, 228 KB

english, 2007

27

[IEEE 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip - Grenoble, France (2010.05.3-2010.05.6)] 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip - Network-on-Chip Architectures for Neural Networks

Vainbrand, Dmitri, Ginosar, Ran

Year:

2010

Language:

english

File:

PDF, 279 KB

english, 2010

28

[IEEE Electronics Engineers in Israel (IEEEI 2010) - Eilat, Israel (2010.11.17-2010.11.20)] 2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel - Comparing NoC architectures for neural networks

Vainbrand, Dmitri, Ginosar, Ran

Year:

2010

Language:

english

File:

PDF, 133 KB

english, 2010

29

[ACM Press the 42nd Annual IEEE/ACM International Symposium - New York, New York (2009.12.12-2009.12.16)] Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture - Micro-42 - Multiple clock and voltage domains for chip multi processors

Rotem, Efraim, Mendelson, Avi, Ginosar, Ran, Weiser, Uri

Year:

2009

Language:

english

File:

PDF, 801 KB

english, 2009

30

StarSync: An extendable standard-cell mesochronous synchronizer

Verbitsky, Dmitry, Dobkin, Rostislav (Reuven), Ginosar, Ran, Beer, Salomon

Journal:

Integration, the VLSI Journal

Year:

2014

Language:

english

File:

PDF, 1.21 MB

english, 2014

31

Eleven Ways to Boost Your Synchronizer

Beer, Salomon, Ginosar, Ran

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2015

Language:

english

File:

PDF, 2.56 MB

english, 2015

32

Rom, Rami, Erel, Jacob, Glikson, Michael, Lieberman, Randy A., Rosenblum, Kobi, Binah, Ofer, Ginosar, Ran, Hayes, David L.

Journal:

IEEE Transactions on Neural Networks

Year:

2007

Language:

english

File:

PDF, 1.48 MB

english, 2007

33

[IEEE 11th IEEE International Symposium on Asynchronous Circuits and Systems - New York City, NY, USA (14-16 March 2005)] 11th IEEE International Symposium on Asynchronous Circuits and Systems - An Asynchronous Router for Multiple Service Levels Networks on Chip

Rostislav, D., Vishnyakov, V., Friedman, E., Ran Ginosar,

Year:

2005

Language:

english

File:

PDF, 201 KB

english, 2005

34

Cache Hierarchy Optimization

Yavits, Leonid, Morad, Amir, Ginosar, Ran

Journal:

IEEE Computer Architecture Letters

Year:

2014

Language:

english

File:

PDF, 251 KB

english, 2014

35

[IEEE 2014 20th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) - Potsdam, Germany (2014.5.12-2014.5.14)] 2014 20th IEEE International Symposium on Asynchronous Circuits and Systems - Metastability in Better-Than-Worst-Case Designs

Beer, Salomon, Cannizzaro, Marco, Cortadella, Jordi, Ginosar, Ran, Lavagno, Luciano

Year:

2014

Language:

english

File:

PDF, 124 KB

english, 2014

36

[IEEE First International Symposium on Networks-on-Chip - Princeton, NJ, USA (2007.05.7-2007.05.9)] First International Symposium on Networks-on-Chip (NOCS'07) - Access Regulation to Hot-Modules in Wormhole NoCs

Walter, Isask'har, Cidon, Israel, Ginosar, Ran, Kolodny, Avinoam

Year:

2007

Language:

english

File:

PDF, 339 KB

english, 2007

37

[IEEE 2013 19th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC) - Berlin, Germany (2013.09.25-2013.09.27)] 19th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC) - Power and thermal constraints of modern system-on-a-chip computer

Rotem, Efraim, Ginosar, Ran, Mendelson, Avi, Weiser, Uri C.

Year:

2013

Language:

english

File:

PDF, 1.24 MB

english, 2013

38

[IEEE 10th International Symposium on Asynchronous Circuits and Systems, 2004. - Crete, Greece (19-23 April 2004)] 10th International Symposium on Asynchronous Circuits and Systems, 2004. Proceedings. - Data synchronization issues in GALS SoCs

Dobkin, R., Ran Ginosar,, Sotiriou, C.P.

Year:

2004

Language:

english

File:

PDF, 1.38 MB

english, 2004

39

[IEEE Conference Publications Design Automation and Test in Europe - Grenoble, France (2013.03.18-2013.03.22)] Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013 - Metastability Challenges for 65nm and Beyond; Simulation and Measurements

Beer, Salomon, Ginosar, Ran, Cox, Jerome, Chaney, Tom, Zar, David M.

Year:

2013

Language:

english

File:

PDF, 587 KB

english, 2013

40

[IEEE 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004. - Tel Aviv, Israel (Dec. 13-15, 2004)] Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004. - Micro-modem - reliability solution for NoC communications

Morgenshtein, A., Bolotin, E., Cidon, I., Kolodny, A., Ran Ginosar,

Year:

2004

Language:

english

File:

PDF, 549 KB

english, 2004

41

[IEEE 2006 IEEE 24th Convention of Electrical & Electronics Engineers in Israel - Eilat, Israel (2006.11.15-2006.11.17)] 2006 IEEE 24th Convention of Electrical & Electronics Engineers in Israel - Asynchronous Bit-stream Compression (ABC)

Morgenshtein, Arkadiy, Kolodny, Avinoam, Ginosar, Ran

Year:

2006

Language:

english

File:

PDF, 4.60 MB

english, 2006

42

[IEEE 2010 IEEE 26th Convention of Electrical & Electronics Engineers in Israel (IEEEI 2010) - Eliat (2010.11.17-2010.11.20)] 2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel - The devolution of synchronizers

Beer, Salomon, Ginosar, Ran, Priel, Michael, Dobkin, Rostislav, Kolodny, Avinoam

Year:

2010

Language:

english

File:

PDF, 686 KB

english, 2010

43

A Model for Supply Voltage and Temperature Variation Effects on Synchronizer Performance

Beer, Salomon, Ginosar, Ran

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2014

Language:

english

File:

PDF, 5.37 MB

english, 2014

44

[IEEE 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07) - Berkeley, CA, USA (2007.03.12-2007.03.14)] 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07) - High Rate Wave-pipelined Asynchronous On-chip Bit-serial Data Link

Dobkin, Rostislav Reuven, Perelman, Yevgeny, Liran, Tuvia, Ginosar, Ran, Kolodny, Avinoam

Year:

2007

Language:

english

File:

PDF, 728 KB

english, 2007

45

[IEEE 2006 IEEE 24th Convention of Electrical & Electronics Engineers in Israel - Eilat, Israel (2006.11.15-2006.11.17)] 2006 IEEE 24th Convention of Electrical & Electronics Engineers in Israel - Link Division Multiplexing (LDM) for Network-on-Chip Links

Morgenshtein, Arkadiy, Kolodny, Avinoam, Ginosar, Ran

Year:

2006

Language:

english

File:

PDF, 4.97 MB

english, 2006

46

[IEEE 2nd International IEEE EMBS Conference on Neural Engineering, 2005. - Arlington, Virginia, USA (March 16-19, 2005)] Conference Proceedings. 2nd International IEEE EMBS Conference on Neural Engineering, 2005. - Low?Power Architectures for Spike Sorting

Zviagintsev, A., Perelman, Y., Ran Ginosar,

Year:

2005

Language:

english

File:

PDF, 1.99 MB

english, 2005

47

[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Routing Table Minimization for Irregular Mesh NoCs

Bolotin, Evgeny, Cidon, Israel, Ginosar, Ran, Kolodny, Avinoam

Year:

2007

Language:

english

File:

PDF, 7.62 MB

english, 2007

48

Compiler-Directed Power Management for Superscalars

Haj-Yihia, Jawad, Asher, Yosi Ben, Rotem, Efraim, Yasin, Ahmad, Ginosar, Ran

Journal:

ACM Transactions on Architecture and Code Optimization

Year:

2015

Language:

english

File:

PDF, 1.30 MB

english, 2015

49

Energy Aware Race to Halt: A Down to EARtH Approach for Platform Energy Management

Efraim, Rotem, Ginosar, Ran, Weiser, C., Mendelson, Avi

Journal:

IEEE Computer Architecture Letters

Year:

2014

Language:

english

File:

PDF, 297 KB

english, 2014

50

SPARSE MATRIX MULTIPLICATION ON AN ASSOCIATIVE PROCESSOR

Yavits, Leonid, Morad, Amir, Ginosar, Ran

Journal:

IEEE Transactions on Parallel and Distributed Systems

Year:

2015

Language:

english

File:

PDF, 1.16 MB

english, 2015